A first-in, first-out dual port memory (FIFO) may be used as a communication path between a data producing process and separate data consuming process. These processes are typically independent of one another and may not even be controlled from a common clock source. That is, the two processes may be asynchronous with respect to one another. To deal with this, a FIFO employs internal read and write pointers to sequence through its array of memory locations. A FIFO also employs circuitry to track the difference in the values of the internal read and write pointers and output signals (flags) when the difference indicates that the memory is empty (E), half-full (HF) and full (F), respectively.
The information provided by the aforementioned flags is, however, not sufficient to optimize the use of a FIFO as a communication path between asynchronous processes. The reason for this is that during the intervals between the times that the aforementioned flags are asserted the data producing and consuming processes have no way of knowing the actual number of memory locations available for the storage of data packets. Thus, during the interval following the assertion of the half-full flag, for example, the data producing process checks the status of the full flag each time it stores a data packet to determine if the FIFO has become full. The data producing process does this because the FIFO rejects any attempt to store data in its memory following the assertion of the full flag. An attempt to write data in the FIFO memory following the assertion of the full may result in losing that data. Consequently, the data producing process incurs a processing penalty as result of checking the full flag each time it stores a data packet in the FIFO.